Manufacture of solid state electornic components

ABSTRACT

The present invention concerns the field of the manufacture of solid state components, and in preferred embodiments, capacitors. The method relates particularly to massed production methods for manufacturing solid state components, such as capacitors. According to one aspect of the present invention there is provided a method of manufacturing multiple solid state electronic components comprising: (i) providing a first substrate provided with a plurality of first solid state electronic component elements formed on a surface e thereof, (ii) providing a second substrate provided with a plurality of second sold state electronic component elements formed on a surface thereof, (iii) aligning the first and second substrates so that respective first and second component elements are each mutually aligned, (iv) fixing the first and second substrates together, so that the first and second elements are operatively connected one to another, thereby to form a substrate sandwich, (v) dividing the substrate sandwich to form a plurality of individual components, each comprising a first component element cooperatively connected to a second component element. Suitable types of component are capacitors, diodes and resistors, although this list is not exhaustive and other suitable components are available to be made using this method.

The present invention concerns the field of the manufacture of solidstate components, and in preferred embodiments, capacitors. The methodrelates particularly to massed production methods for manufacturingsolid state components such as capacitors.

A massed production method for solid state tantalum capacitors isdescribed in U.S. Pat. No. 5,357,399 (inventor Ian Salisbury). Thismethod involves providing a substrate wafer of solid tantalum, forming asintered, highly porous, layer of tantalum on the substrate, sawing thelayer of porous tantalum with an orthogonal pattern of channels toproduce an array of upstanding porous tantalum rectilinear bodies,anodising the cubes to produce a dielectric layer on the bodies, dippingthe bodies in manganese nitrate solution and heating to convert theapplied solution to manganese dioxide thereby to form a cathode layer,applying respective conducting layers of carbon and then silver onto topends of each body, bonding a lid consisting of a wafer of solid metalonto the silver layer; injecting insulating resin material into thechannels between bodies constrained by the substrate and lid; andslicing the assembly in a direction perpendicular to the plane of thewafers and along the centre line of each channel thereby to produce aplurality of capacitors in which the anode terminal consists ofsubstrate material, the cathode terminal consists of lid material andthe capacitive body consists of the coated porous tantalum body.

With miniaturisation of electronic goods, particularly mobiletelephones, but also many other goods, there is continued pressure toimprove the volumetric efficiency of electronic components, and inparticular solid state capacitors. The above Salisbury method provides ahighly effective method for the manufacture of plural solid statecapacitors.

PCT/GB99/03566 discloses a method of increasing volumetric efficiency insolid state capacitors manufactured generally according to the Salisburymethod. The process improvement involves omission of a lid layer andforming a cathode terminal directly on an exposed surface of the anodebody of each capacitor.

PCT/GB00/01263 discloses a method of forming multiple capacitors, eachof which has pole contacts on a common face, thereby permitting thecapacitor to be placed overlaying respective printed circuit board (PCB)contacts, reducing the footprint of the component on a PCB.

It is an object of the present invention to provide an improved methodof manufacturing solid state electronic components, particularly amethod which permits the production of components having a reduced footprint. The preferred method relates to the production of capacitorshaving reduced footprint.

According to one aspect of the present invention there is provided amethod of manufacturing multiple solid state electronic componentscomprising:

(i) providing a first substrate provided with a plurality of first solidstate electronic component elements formed on a surface thereof,

(ii) providing a second substrate provided with a plurality of secondsolid state electronic component elements formed on a surface thereof,

(iii) aligning the first and second substrates so that respective firstand second component elements are each mutually aligned,

(iv) fixing the first and second substrates together, so that the firstand second elements are operatively connected one to another, thereby toform a substrate sandwich,

(v) dividing the substrate sandwich to form a plurality of individualcomponents, each comprising a first component element operativelyconnected to a second component element.

Suitable types of component are capacitors, diodes and resistors,although this list is not exhaustive and other suitable components areavailable to be made using this method.

The first component elements and the second component elements may havethe same electronic function. For example, the component elements mayeach be capacitors, or may each be resistors. In certain embodiments,the respective elements may have differing performance characteristicsas between first elements on the one hand and second on the other. So,for example, capacitors having differing capacitances may beincorporated in a the final component.

Alternatively, and according to another aspect of the invention, thefirst and second component elements respectively have differentelectronic functions. In this way, for example a component may be formedcomprising a capacitor connected to a resistor.

This foregoing general method allows the production of dual elementcomponents, for example capacitor pairs, in a single component.Integrating a pair of electronic elements into a single componentreduces the footprint as compared to two individual components, andreduces the number of solder steps required to incorporate thecapacitors into an electrical circuit, typically on a PCB. Anotherimportant advantage is that in since one component is taking the placeof two, the assembly time and number of assembly steps for a PCB arereduced.

According to a preferred aspect of the present invention, there isprovided a method of manufacturing multiple solid state capacitivecomponents comprising:

a) providing a first substrate layer;

b) forming on one surface of the first substrate layer a plurality offirst upstanding bodies consisting of porous sintered valve-actionmaterial;

c) providing a second substrate layer;

d) forming on one surface of the second substrate layer a plurality ofsecond upstanding bodies consisting of porous sintered valve-actionmaterial;

e) forming an insulating layer on and extending through the porosity ofthe first and second bodies;

f) forming a conducting cathode layer on the insulating layer;

g) aligning the first and second substrates so that the bodies aremutually aligned;

h) fixing the first and second substrates together to form a substratesandwich in which first and second bodies are operatively connected;

i) encapsulating the porous bodies in electrically insulating materialand

j) dividing the substrate sandwich into a plurality of individualcapacitive components, each comprising two capacitors, the firstcorresponding to the first porous body and the second corresponding tothe second porous body.

According to a particular embodiment of the invention, at step g) thesubstrates may be aligned face to face so that their respective firstand second upstanding bodies face each other and step h) compriseselectrically connecting aligned free ends of the upstanding bodies toform a sandwich configuration in which the first and second substratelayers are outer layers, whereby on division of the substrate sandwich,there is formed a plurality of component pairs, each having first andsecond anodic terminals corresponding to the outer first and secondsubstrates, and a cathodic region corresponding to the electricalconnection between the free ends of the bodies.

At step g) a plate of conducting material may be interposed between therespective free ends of the first and second bodies so that theelectrical connection is made via the plate material. Thus dividing atstep h) also divides the plate material, and an exposed surface portionof the plate material formed in each component by the dividing providesa cathode terminal for each component. By providing a plate materialterminal site, it is possible to configure the devices as a parallelpair in which the cathode terminal provides a negative electricalcontact and the two anode terminals are electrically connected toprovide a positive electrical contact site. The connection of both anodeterminals is typically by a printed circuit lines on a circuit boardterminal. It is also possible to provide an array pair in which theanode terminals provide two distinct positive contact sites and thecathode terminal provides a negative contact site. It is also possibleto provide a series pair, by connection of the respective anodeterminals in a circuit, without connecting the cathode terminal.

According to yet another embodiment of the invention, step g) is made bymeans of discrete conducting adhesive pads applied between the free endsof the first and second upstanding bodies. Thus the encapsulationprocess at step h) may also encapsulate the electrical connectionregion, thereby obscuring the cathodic region in each component andpermitting the formation of a component without a cathodic terminal. Theabove embodiment is suitable for producing series pair capacitorcomponents. In these components a negative terminal is not required.Hence the plate used to form a cathode terminal in the first embodimentabove may be omitted. Conveniently a conducting adhesive paste or thelike is used to electrically connect upstanding body free ends. Theconnection region is encapsulated to prevent accidental contact with thecathode terminal. This embodiment is simpler to manufacture, but clearlylacks the versatility of the components made according to the firstembodiment.

According to a further embodiment of the invention, at step g) thesubstrates may be aligned back to back so that their respective firstand second upstanding bodies face away from each other and step h)comprises electrically connecting back faces of the substrates togetherto form a sandwich configuration in which the first and second substratelayers are inner layers, and the porous bodies are outer layers, wherebyon division of the substrate sandwich, there is formed a plurality ofcomponent pairs, each having an anodic terminal region corresponding tothe inner first and second connected substrates, and first and secondcathodic terminal regions corresponding to respective first and secondend regions of the component.

In preferred embodiments the valve-action material for use in forming acapacitor is a metal, and in particular tantalum. However othervalve-action materials and metals may be used in the process of thepresent invention. Examples are niobium, molybdenum, silicon, aluminium,titanium, tungsten, zirconium and alloys thereof.

When the valve action metal is tantalum the substrate is preferably asolid tantalum wafer, thereby ensuring physical and chemicalcompatibility with the porous metal.

The porous bodies may be formed by a powder metallurgy route. Typicallya seeding layer of coarse grade powder may have to be applied to thesubstrate and sintered thereto before a finer grade green powder/bindermixture is pressed onto the substrate. The coarse grade powder providesmechanical keying ensuring that a strong connection between the sinteredporous bodies and the substrate is produced. The strong connection isnecessary to ensure that separation of the porous bodies from thesubstrate does not occur during subsequent steps in the manufacturingprocess. A uniform layer of green powder/binder mixture can be appliedto the substrate, fixed by sintering, and then machined to form thedesired array of bodies on the substrate. An alternative method offorming the bodies is described in PCT application GB00/03058, in whicha die/pressing process is used to produce a green array of bodies on thesubstrate, which array is sintered to form the final porous bodies.

The dielectric layer may be formed by an electrolytic anodizationprocess in which an oxide film is carefully built up on the surface ofthe porous sintered anode body. Suitable methods will be known to theperson skilled in the art.

The cathode layer may be formed by dipping the upstanding bodies into acathode layer precursor solution such as manganese nitrate and thenheating to produce a cathode layer of manganese dioxide. Repeateddipping and heating steps may be carried out in order gradually to buildup the required depth and integrity of cathode layer.

Typically, during the dipping process the cathode layer will be built upnot only on the anode bodies, but also on the exposed tantalum substratesurface between bodies. In order that each cathode terminal is isolatedfrom its respective anode terminal a further process step may be carriedout to remove any cathode layer (and dielectric layer) from thesubstrate around the anode body. This process may involve a furthermachining process in which isolating channels are formed between eachanode body by removal of a surface layer of substrate. For example,where orthogonal rows have been machined to form rectilinear anodebodies, isolating channels may be machined along the centre lines of therows and columns between anode bodies. In this way, a step is formed inthe perimeter of each capacitor anode body, which step has an un-coatedsurface, thereby isolating the cathode layer from the exposed anodeterminal. A reformation process may then be carried out in which thenewly exposed surface is formed with an insulating oxide layer. Analternative isolation process is described in PCT applicationGB00/03558, in which machining is replaced by the use of resist layersto prevent unwanted contamination.

The encapsulation process may be carried out by infiltrating a liquidresin into the space between upstanding bodies. In one preferredembodiment the space is filled with an insulating plastics resinmaterial, such as epoxy resin. In this way when the substrate is dividedeach capacitor body may be left with a protective resin sleeve about theporous body portions thereof. The encapsulating resin may be appliedunder pressure or by simple immersion depending upon the suitability andfluidity of the particular resin. Once the resin has set, the resin andsubstrate may be machined or otherwise cut to separate adjacentcapacitor bodies. The encapsulation material may be a plastics resin,such as epoxy.

Where it is desired to have a cathode terminal, the terminal may beformed by applying one or more conducting layers to the band of exposedplate provided on each component by the dividing process. Suitablesolder compatible metal layer coatings may be applied as required tofacilitate soldering at the terminal.

The dividing of the substrate sandwich is typically carried out bymachining perpendicular to the plane of the substrates, along the“streets” between adjacent body portions, and thus through theencapsulation material.

According to a further aspect of the invention there is provided acapacitor produced by any method hereinbefore described.

According to another aspect of the invention there is provided anelectronic or electrical device comprising a capacitor made by anymethod hereinbefore described.

Following is a description by way of example only and with reference tothe drawings of one method of putting the present invention into effect.

In the drawings:—

FIGS. 1, 3 and 4 are cross-sectional views of a substrate duringprocessing according to a process of the present invention.

FIG. 2 is a view from above of the substrate after a machining step inthe process.

FIG. 5 is a sectional view through two substrates being processedaccording to a first embodiment of the present invention.

FIG. 6 is a sectional view through substrates processed according to thefirst embodiment.

FIG. 7 is a sectional view through a substrate sandwich processedaccording to the first embodiment.

FIG. 8 is a sectional view through an individual capacitor paircomponent made according to the first embodiment.

FIG. 9 is a sectional view through two substrates being processedaccording to a second embodiment of the present invention.

FIG. 10 is a sectional view through a substrate sandwich producedaccording to a second embodiment of the invention.

FIG. 11 is a sectional view through a capacitor pair component producedaccording to the second embodiment of the invention.

FIG. 12 is a plan view of components according to the first and secondembodiments integrated into a circuit as series pairs. Also shown is aschematic circuit diagram representation of the series pair.

FIG. 13 is a plan view of a component according to the second embodimentof the invention, integrated into a circuit as a parallel pair. Alsoshown is a schematic circuit diagram representation of the parallelpair.

FIG. 14 is a plan view of a component according to the second embodimentof the invention, integrated into a circuit as an array pair. Also shownis a schematic circuit diagram representation of the array pair.

A transverse section through a solid tantalum circular wafer is shown as10 in FIG. 1 (other shapes are possible such as square, rectangularetc.). An upper surface of the wafer has sintered thereon a dispersionof coarse grained capacitor grade tantalum powder 12. A green (i.e.un-sintered) mixture of fine-grained capacitor grade tantalumpowder/binder is then pressed onto the upper surface of the substrate toform a green layer 13.

The green layer is sintered to fuse the fine grained powder into anintegral porous network. The sintering is carried out at around 1600degrees centigrade (the optimum temperature will depend upon the grainsize and the duration of the sintering process). The sintering processalso fuses the porous layer to the coarse seeding layer 12.

The substrate assembly is then machined to produce an orthogonal grid oftransverse channels 14 and longitudinal channels 15 as shown in FIG. 2.The channels are ground using a moving rotating cutting wheel. Thechannels are cut to a depth just beyond the level of the porous tantalumlayer so that the cuts impinge on the substrate, as shown in FIG. 3.

The machining process produces an array of orthogonal section bodies 16on the substrate. The porous bodies form the anode portions of thecapacitors. An insulating dielectric layer (not shown) is applied to theanode bodies by anodizing in an electrolyte bath (of e.g 0.1% phosphoricacid solution) while connecting the positive terminal of a D.C. powersupply to the substrate. This results in the formation of a thintantalum pentoxide layer on the metal porous surface of the bodies andexposed substrate.

A cathode layer (not shown) is then formed on the anode bodies by thewell known manganization process. In this process the anodized anodebodies 16 are immersed in manganese nitrate solution to leave a coatingof wet solution on each body and covering its internal porosity. Thesubstrate is heated in moist air to convert the coating of nitrate tothe dioxide. The immersion and heating cycles may be repeated as many as20 times or more in order to build up the required coherent cathodelayer.

Next, the manganized bodies are coated with an intermediate layer (notshown) of conducting carbon by dipping into a bath of liquid carbonpaste. The carbon paste is allowed to set. After the carbon layer hasset, a further intermediate layer 27 (FIG. 3) of silver is coated ontothe carbon layer by dipping of the carbon-coated bodies into a liquidsilver paste. The silver layer is not allowed to pass beyond the carbonlayer underneath in order to ensure that silver does not directlycontact the incompatible oxide underlayer.

In the above process stray portions of manganizing layer, carbon pasteor silver paste may contaminate surface portions of the substratechannels 15,14. These conducting portions could cause a short circuitbetween the anode and cathode in the final capacitors, so must beremoved. In order to do this, a further machining step is carried out inwhich an orthogonal pattern of channels 32 is sawn into the substratesurface (as shown in FIG. 4), along the centre lines separating eachanode body. The sawing is carried out to a depth at which both straymanganizing layer (etc.) and, with it, dielectric insulating oxideunderlayer is removed. Hence bare tantalum of the substrate wafer isrevealed. This fresh surface is “re-formed” with dielectric layer, inorder to provide a protective insulating layer thereon. The re-formingprocess is carried out as described above for the original dielectriclayer.

In parallel with the foregoing procedure, a second, identical substrate110 is built up as above. This substrate is shown in FIG. 5, withnumbering as for wafer 10, save for the addition of 100 (i.e. numberingfor the second wafer=n+100).

Having reached this stage, there are now described hereafter twoalternative embodiments of processes of the invention by which capacitorcomponents may be made.

First Embodiment

The second substrate 110 is then aligned over the first substrate as amirror image with bodies 16,116 facing one another. An adhesive layer 40of silver paste is applied to top faces of each body of on the firstsubstrate 10. The two facing upper surfaces of each respective body16,116 are brought together (as indicated by arrow A in FIG. 5). FIG. 6shows the two substrates in contact. The adhesive layer 40 forms aninterface which provides electrical contact between the respective firstand second body pairs 16,116. The adhesive is allowed to set under acompressive pressure and temperature, in order to ensure a good bond andcomplete curing of the adhesive.

An encapsulation process is then carried out. Epoxy resin solution 41(in FIG. 7) is infiltrated into the channels 15,115,14 formed betweenbody pairs. The resin is forced in under pressure in order to take upall available space. The resin is allowed to harden to form a tough,electrically insulating encapsulation of body pairs 16,116.

A machining process is then conducted to separate the substrate sandwich10,110 into individual components. The machining comprises use of a finesaw to machine in an orthogonal pattern through the centre line ofchannels 14,15,115 as indicated by the dashed lines in FIG. 7. Thesubstrate is thereby divided into individual rectilinear components,each comprising a capacitor pair 60 as shown in FIG. 8.

Each capacitor pair consists of two anode terminal portions 23,123consisting of the substrate material 10,110. Sintered to each of thesubstrates is a respective capacitor body 16,116. The bodies aresheathed in epoxy resin sidewalls 24,25. The step 30,31 in the substratecorresponds to the machine isolation channels 32,132 formed in theoriginal substrate wafer. This step is free of manganized coating andany other contaminant, and therefore ensures that the exposed anodeterminal is isolated from the cathode terminal. The top end region ofeach capacitor body is coated in a layer of carbon paste (not shown), alayer of silver paste 21,121 and a further layer of silver paste 40which forms a cathode portion of the component. As the cathode portionis sheathed in resin encapsulation material, there is no cathodeterminal, the component representing a capacitor series pair having twoanode terminals.

A final processing stage is a five-sided termination process. This is awell known process in the electronics industry which involves theformation of end caps 28,29 which form the external terminals of thecapacitor. The termination layer metal may consist of discrete layers ofsilver, nickel and tin (preferably in that order). These are suitablemetals for forming electrical connections by soldering of the capacitorterminals to contacts or other components of an electrical or electroniccircuit.

Second Embodiment

A second process according to the present invention proceeds asdescribed in the foregoing with respect to FIG. 1 to 4. A tantalum plate50 is provided, coated on each side thereof with a silver adhesive paste52 (see FIG. 9). The processes substrates 10,110 (as previouslydescribed) are brought together either side of the plate 40, asindicated by arrows B and B′. On contacting (see FIG. 10) of the carboncoated end faces 27,127 of the bodies 16,116 with the adhesive paste 52,an electrical contact is formed. The silver adhesive is set underpressure and temperature to form a good electrically conductive bond.The plate 50 is thereby sandwiched between the two processed substrates10,110.

An encapsulation process is carried out, as for embodiment 1, save thattwo separate infiltrations of resin 41 are required, corresponding tothe area between the bodies 16 on the one hand and bodies 116 on theother.

After hardening of the encapsulation resin, the substrate sandwich isthen separated into individual component capacitor pairs by machining aswith the first embodiment, along channels 14,15,115 etc, indicted by thedashed lines in FIG. 10.

The component formed 70 is shown in FIG. 11. Each capacitor componentconsists of two anode terminal portions 23,123 consisting of thesubstrate material 10,110. Sintered to each of the substrates is arespective capacitor body 16,116. The bodies are sheathed in epoxy resinsidewalls 24,25. The step 30,31 in the substrate corresponds to themachine isolation channels 32,132 formed in the original substratewafer. This step is free of manganized coating and any othercontaminant, and therefore ensures that the exposed anode terminal isisolated from the cathode terminal. The end face region of eachcapacitor body is coated in a layer of carbon paste (not shown) and alayer of silver paste 27,127. A further layer of silver paste 52 isjuxtaposed a metal plate section 50, which forms a cathode portion ofthe component. The plate may be any conductive material which is capableof being bonded and plated, for example steel or copper.

Next the anode terminal portions are subject to a five-sided terminationprocess. This is a well known process in the electronics industry whichinvolves the formation of end caps 28,29 (coating five exposed sides ofthe anode terminal portions) which form the external terminals of thecapacitor. Similarly a four-sided termination process is conductedaround the cathode region to form a cathode terminal band 55 coveringthe four sidewalls of the component, and in electrical contact with theplate 50 and adhesive 52.

The termination layer metal preferably consists of discrete layers ofsilver, nickel and tin (preferably in that order). These are suitablemetals for forming electrical connections by soldering of the capacitorterminals to contacts or other components of an electrical or electroniccircuit.

The component produced therefore has two anode end terminals and acentral cathode terminal. This may be integrated with an electricalcircuit in a variety of ways, as shown in FIGS. 12, 13 and 14.Particular examples are the series pair of FIG. 12 in which the cathodeterminal is unconnected; the parallel pair of FIG. 13 in which bothanodes are connected to a single circuit line and the cathode terminalto another; and the array pair of FIG. 14, in which the two anodeterminals are each connected to respective circuit lines, and thecathode terminal to a third circuit line.

The present invention provides a method of manufacturing multiplecapacitor pair components, each of which has high volumetric efficiencycompared to two individual capacitors, and requiring less PCB footprintthan two individual components. The method produces capacitors which are“non-polar” in the sense that they are incapable of being misoriented;the end poles always have one polar value (in the embodiments above,positive), and the central pole another polar value (negative). Hencethe capacitors are easier to mount, as it is not necessary to determinea specific orientation before connecting the component to a PCB.

1. A method of manufacturing multiple solid state electronic componentscomprising: (i) providing a first substrate provided with a plurality offirst solid state electronic component elements formed on a surfacethereof, (ii) providing a second substrate provided with a plurality ofsecond solid state electronic component elements formed on a surfacethereof, (iii) aligning the first and second substrates so thatrespective first and second component elements are each mutuallyaligned, (iv) fixing the first and second substrates together, so thatthe first and second elements are operatively connected one to another,thereby to form a substrate sandwich, (v) dividing the substratesandwich to form a plurality of individual components, each comprising afirst component element operatively connected to a second componentelement.
 2. A method as claimed in claim 1 wherein the first componentelements and the second component elements have the same electronicfunction.
 3. A method as claimed in claim 2 wherein the respectiveelements have differing performance characteristics as between firstelements on the one hand and second on the other.
 4. A method as claimedin claim 1 wherein the first and second component elements respectivelyhave different electronic functions.
 5. A method of manufacturingmultiple solid state capacitive components comprising: a) providing afirst substrate layer; b) forming on one surface of the first substratelayer a plurality of first upstanding bodies consisting of poroussintered valve-action material; c) providing a second substrate layer;d) forming on one surface of the second substrate layer a plurality ofsecond upstanding bodies consisting of porous sintered valve-actionmaterial; e) forming an insulating layer on and extending through theporosity of the first and second bodies; f) forming a conducting cathodelayer on the insulating layer; g) aligning the first and secondsubstrates so that the bodies are mutually aligned; h) fixing the firstand second substrates together to form a substrate sandwich in whichfirst and second bodies are operatively connected, i) encapsulating theporous bodies in electrically insulating material and j) dividing thesubstrate sandwich into a plurality of individual capacitive components,each comprising two capacitors, the first corresponding to the firstporous body and the second corresponding to the second porous body.
 6. Amethod as claimed in claim 1 wherein at step g) the substrates arealigned face to face so that their respective first and secondupstanding bodies face each other and step h) comprises electricallyconnecting aligned free ends of the upstanding bodies to form a sandwichconfiguration in which the first and second substrate layers are outerlayers, whereby on division of the substrate sandwich, there is formed aplurality of component pairs, each having first and second anodicterminals corresponding to the outer first and second substrates, and acathodic region corresponding to the electrical connection between thefree ends of the bodies
 7. A method as claimed in claim 5 wherein atstep g) the substrates are aligned back to back so that their respectivefirst and second upstanding bodies face away from each other and step h)comprises electrically connecting back faces of the substrates to form asandwich configuration in which the first and second substrate layersare inner layers, and the porous bodies are outer layers, whereby ondivision of the substrate sandwich, there is formed a plurality ofcomponent pairs, each having an anodic terminal region corresponding tothe inner first and second connected substrates, and first and secondcathodic terminal regions corresponding to respective first and secondend regions of the component.
 8. A method as claimed in claim 6 whereinat step g) a plate of conducting material is interposed between therespective free-ends of the first and second bodies so that theelectrical connection is made via the plate material.
 9. A method asclaimed in claim 8 wherein the dividing at step h) also divides theplate material, and an exposed surface portion of the plate materialformed in each component by the dividing provides a cathode terminal foreach component.
 10. A method as claimed in claim 6 wherein theelectrical connection at step g) is made by means of discrete conductingadhesive pads applied between the free ends of the first and secondupstanding bodies.
 11. A method as claimed in claim 10 wherein theencapsulation process at step h) also encapsulates the electricalconnection region, thereby obscuring the cathodic region in eachcomponent and permitting the formation of a component without a cathodicterminal.